Hierarchical blocks
Group components and routes into reusable subcircuits with external pins and a frozen layout, then compose them into larger photonic systems.
Real photonic systems are not flat. A transceiver, a filter bank, or a switch fabric is built from smaller functional units that repeat — a filter stage, a splitter tree, a modulator cell. Hierarchical blocks let you capture one of those units once and reuse it everywhere, instead of redrawing the same components and routes by hand each time.
A block is a subcircuit you build like any other part of your design: place components, route waveguides between their pins, and verify the result. You then promote that group into a single reusable unit with external pins and a frozen layout. From that point on, the block behaves like a component — you instance it, connect to its external pins, and treat its internals as a settled detail.
What a block is
A block packages three things together so they travel as a unit and stay physically meaningful wherever you place it.
- Internal contents — the components and the explicit waveguide routes between them. This is the actual circuit the block implements.
- External pins — the subset of internal pins you expose at the block boundary. These are the only ports the outside world connects to; everything else is encapsulated.
- A frozen layout — the internal placement and routing geometry are fixed relative to the block. Because the workspace works in real micrometers, the block carries its true footprint and the real positions of its external pins with it.
This mirrors a core idea of the workspace: the design is one editable model that carries layout, connectivity, hierarchy, and physics together. A block is that same model, scoped down and given a clean boundary. See Core concepts for the full picture.
External pins and encapsulation
External pins are the contract between a block and its surroundings. They expose where light enters and leaves, at real physical positions, while hiding the internal wiring. When you instance a block, you route to its external pins exactly as you would to any component pin — and the same connection state applies: a pin renders red when unconnected and green once a route reaches it. Internally, the block's own connections were already resolved when you built it, so a placed instance starts from a known-good circuit.
Why hierarchy matters
Hierarchy is how you keep a large design tractable. The same motivation drives cells and subcircuits in electronic EDA, but in photonics it carries extra weight because geometry is physical: a block does not just group symbols, it freezes a real, routed, loss-bearing layout you have already validated.
| Benefit | What it gives you |
|---|---|
| Reuse | Build a functional unit once, then instance it many times without redrawing components or re-routing waveguides. |
| Scale | Compose blocks into larger blocks. A few well-defined units assemble into a system you could not lay out flat by hand. |
| Managing complexity | A clean external-pin boundary lets you reason about a block by its ports, not its internals — the same abstraction that makes cell-based design work in EDA. |
| Consistency | A reused block carries the same verified geometry everywhere, so every instance has the same physical behavior. |
Encapsulation is the payoff: once a block is trusted, you stop thinking about its waveguides and think only about its pins. That is what makes it possible to move from a handful of components to a system with many repeated stages.
A concrete example
Consider a ring-based filter stage: a bus waveguide coupled to a microring resonator, with an input pin, a through pin, and a drop pin. On its own it is a few components and a couple of routes. As a block, it becomes a single reusable unit with three external pins.
Now build a filter bank by instancing that block several times and chaining each through pin to the next stage's input. Or build a splitter tree by capturing one splitter cell — a Y-splitter or directional coupler with two output pins — as a block, then instancing it level by level to fan one input out to many outputs. In both cases you compose at the level of pins and blocks, while the internal geometry of each instance stays frozen and verified.
Because routes are real waveguide geometry, the connections you draw between block instances are themselves real S-bend and Manhattan paths between physical pins — and they cost loss like any other route. Composing with blocks does not hide that physics; it just keeps the parts you have already settled out of your way.
Blocks and the rest of the workspace
Hierarchy composes with everything else in the design. The same components and routing tools you use at the top level build the inside of a block. Because the workspace is simulation-aware, transmission and loss derive from the actual path geometry — including the routes inside your blocks and the routes between their instances — so a hierarchical design stays physically grounded all the way down. And because hierarchy is part of the design model, it carries through on export to a fabrication flow.