Your first layout

This walkthrough takes you through a complete loop in Qfactr: placing a component, connecting it with a real waveguide route, and running a loss check on the geometry you drew. The point is not the specific circuit but the rhythm — place, route, simulate, iterate — because in Qfactr those steps share a single editable model rather than living in separate tools.

If you have not opened the editor yet, The workspace maps every panel; for the model underneath it, see Core concepts. New to photonics altogether? Start with Photonic ICs 101 and come back.

Before you begin

You need an open project. A new project starts with the bundled Demo-PDK — a process design kit whose parts carry physical pin positions and S-matrix (S-parameter) data — so you can place real, fabricable-style devices without configuring a process first. You do not need to set anything up beyond that.

Keep one idea in mind throughout: the canvas is a true physical plane measured in micrometers (µm), not an abstract grid. Where you put a component decides how far its pins sit from everything they connect to, and geometry is loss — every bend and detour a waveguide takes costs optical power.

Build the layout

The loop is short: place a part, route to it, check the loss, adjust. Follow it once here and it becomes the way you work.

1. 1
   Place a componentSearch the library in the left panel and add a part to the center canvas — a ring resonator is a good first part. It lands at real micron coordinates with its true footprint and its pins (the physical optical ports). Unconnected pins render red, marking what still needs routing. In the properties panel on the right you can edit parameters, for example setting the ring radius to r = 10 µm.
2. 2
   Arrange in Select modeUse Select mode in the toolbar to position the part. Because the canvas is physical, the spacing you leave is the real distance a waveguide will later have to span — so leave room for a clean, gently curved connection.
3. 3
   Route a waveguideSwitch to Connect mode and draw a route between two pins. Qfactr builds it as a real S-bend and Manhattan waveguide path between the physical ports, not an abstract net. As each connection lands, its pins turn from red to green.
4. 4
   Run SimulateTrigger the Simulate action in the toolbar. Qfactr derives transmission and loss from the geometry you actually drew. A power-flow gradient animates along the waveguides — teal to green to yellow to red as power drops — and a loss readout appears in the status bar.
5. 5
   IterateRead the gradient as a map: where a segment shifts toward yellow or red, look for a tight bend, a crossing, or an unnecessary detour. Adjust placement or routing, then re-run Simulate to confirm the change helped.

Try the AI assistant

The right panel includes an AI assistant that works over the structured circuit state — components, pins, routes, hierarchy, and physical constraints. It is not a chatbot bolted onto a canvas: its edits land in the real design and respect its physics. You can ask it to make a change in plain language, for example:

Add a ring filter on the lower arm at 1550 nm

From a request like that, the assistant places a ring resonator (r = 10 µm) on a pin such as PS2.out, routes it to a target like CMB.in2, and re-checks loss — the same place, route, simulate loop you just ran by hand. The AI assistant page covers how it stays grounded in the design.

Hand it off

When the layout is in good shape, the same model exports straight out — there is no translation step between what you designed and what you fabricate or simulate. Nazca (Python) and GDS hand off to a fabrication flow; SAX and Simphony drive circuit-level, frequency-domain S-parameter simulation; PhotonTorch handles time-domain simulation on GPU; and Verilog-A / SPICE support co-simulation with electronics.

See Exporting your design for the workflow and Export formats for what each target is for.

Next steps