PIC 101

A photonic integrated circuit (PIC) is a chip that processes light instead of electrical current. Where an electronic IC moves electrons through metal wires and transistors, a PIC guides photons through waveguides and optical components patterned into a thin film of high-index material. The result is a single chip that can route, split, filter, modulate, and detect light.

This page is a ground-up primer for readers who are new to photonics. It covers what a PIC is made of, why designing one is physically different from designing electronics, and how a layout becomes a fabricated device. If you already know the physics and want the workspace model, skip ahead to core concepts.

Why photonics

Light is an attractive carrier for both communication and computation. A single waveguide can carry many wavelengths at once without them interfering, so one physical channel can hold many independent signals — the basis of wavelength-division multiplexing. Optical signals also dissipate far less power over distance than electrical ones and are immune to electromagnetic interference. These properties have made PICs central to optical transceivers in data centers, and they are increasingly applied to sensing, LiDAR, quantum information, and optical interconnect.

Integration is what makes this practical. Rather than assembling discrete lenses, fibers, and lasers on a bench, a PIC patterns hundreds of optical components onto one chip using the same lithographic processes that produce electronic ICs. That brings the cost, density, and repeatability of semiconductor manufacturing to optics.

How light is guided

The fundamental structure of a PIC is the waveguide: a core of high refractive index surrounded by lower-index cladding. Light in the core is confined by total internal reflection at the core–cladding boundary, the same effect that traps light in an optical fiber. The greater the index contrast between core and cladding, the more tightly the light is held and the tighter the bends the waveguide can take.

Light does not travel through a waveguide as a free-space beam but as a mode — a stable transverse field pattern fixed by the cross-section and the operating wavelength. Most signal routing uses single-mode waveguides, because additional modes travel at different speeds and interfere, distorting the signal. Whether a given geometry is single-mode depends on the wavelength, so a design is always tied to the optical band it targets, commonly the 1550 nm telecom band.

The building blocks

A PIC is assembled from a vocabulary of passive and active components, each performing a specific optical function. The common ones are:

These components are characterized by their S-parameters (a scattering matrix), which describe how optical power and phase transfer between a device's ports as a function of wavelength. Carrying that data per component is what lets a design tool reason about how a whole circuit behaves, not just how it is wired. See the components reference for how each part is modeled.

Why photonic design is different

In electronics, a wire is essentially free: its length and the corners it turns barely affect the signal, so connectivity can be captured in a schematic and the physical layout worked out afterward. Photonics does not allow this separation. In a PIC, geometry is loss — every bend, every crossing, and every extra micrometer of path radiates or scatters optical power away.

A bend that is too tight leaks light into the cladding. Two waveguides cannot cross without a loss penalty. A long detour quietly accumulates propagation loss along its whole length. Because of this, where components sit and how they are connected are entangled: placement determines whether a route is even possible at acceptable loss. This is why a photonic layout cannot be treated as a bookkeeping exercise — the physics lives in the drawing. The layout problem page develops this in full, and waveguides & routing covers the loss mechanisms in detail.

From design to chip

Turning a design into a manufacturable device runs through a few standard stages. A foundry publishes a process design kit (PDK) — the qualified components, design rules, and material parameters for its process. You build your circuit from PDK-backed parts so that what you draw matches what the fab can make.

1. 1
   Design against a PDKPlace components and route waveguides using a process design kit, so geometry and parameters respect the target process. See PDKs.
2. 2
   Check the physicsVerify that bends, crossings, and path lengths keep loss acceptable, and that the circuit transmits as intended — the heart of simulation-aware design.
3. 3
   Run design rule checksConfirm the layout satisfies the foundry's geometric rules (minimum widths, spacings, radii) before handoff.
4. 4
   Export to GDSIIHand off the mask layout in the standard GDSII format the foundry fabricates from. See exporting.

Verification at the physics stage typically draws on electromagnetic methods such as FDTD (finite-difference time-domain) and EME (eigenmode expansion) for individual components, and S-parameter circuit simulation for the system as a whole. Catching problems here — before a fabrication run that takes weeks — is what makes fast, accurate design feedback so valuable.

How Qfactr fits in

Qfactr is a photonic IC design workspace built on the open-source Lunima engine. It applies the principles above directly: components live at real micrometer coordinates, waveguides are explicit S-bend and Manhattan geometry between real pins, and transmission and loss are derived from the actual path rather than estimated from a schematic. Parts are PDK-aware, carrying physical pin positions and S-matrix data, and finished designs export through a Nazca and GDS flow into existing fabrication and simulation toolchains.

The goal is to let you iterate in days, not weeks: see the consequences of a layout decision as you make it, rather than after a downstream simulation or fab run. The core concepts page describes the model this is built on.

Next steps