The workspace

A tour of the Qfactr design environment — the toolbar, the component library, the micron-scale canvas, the properties and assistant panels, and the status bar — and what each part does.

The workspace is where you build photonic circuits. It is organised around a single editable model — layout, routing, components, hierarchy, and simulation-aware context live together — so everything you see on screen reflects the real, physically grounded design. This page walks through each region of the interface and how they work together.

If you have not built anything yet, Your first layout takes you through placing a component, routing a waveguide, and running a loss check end to end. For the model behind the interface, see Core concepts.

Layout at a glance

The window has standard chrome and a toolbar across the top, with the design surface and three working regions below it. From left to right: a component library, the canvas, and a context panel for the current selection. A status bar runs along the bottom.

RegionWhereWhat it holds
ToolbarTopInteraction modes — Select, Connect, Delete — and the Simulate action.
Component libraryLeft panelA searchable list of parts plus the active PDK.
CanvasCenterThe micron-scale design surface where components and routes live.
Context panelRight panelProperties, parameter sweeps, and the AI assistant.
Status barBottomLive readouts, including loss for the current design.

The toolbar

The toolbar sets how a click on the canvas is interpreted. You spend most of your time switching between a few modes:

  • Select — pick and move components, and choose a pin or route to inspect in the right panel.
  • Connect — draw a waveguide between two component pins; the route is created as real geometry, not an abstract net.
  • Delete — remove a component or a route from the model.

Simulate is an action rather than a mode. Running it derives transmission and loss from the actual path geometry and gives you immediate, design-time feedback on the current layout — covered under The status bar and Simulate below.

Component library and PDK

The left panel is a searchable component library backed by the active process design kit (PDK). New projects start with a built-in Demo-PDK so you can build immediately. The parts here are not generic symbols: each carries physical pin positions and S-matrix (S-parameter) data, so a component behaves like the device it represents the moment you place it.

Typical photonic parts you will find include straight and bend waveguides, directional and MMI couplers, Y-splitters, ring resonators, Mach–Zehnder interferometers, phase shifters, and grating or edge couplers for I/O. To place one, search the library and drop it onto the canvas — covered in Placing components. For more on what a PDK is and why parts carry physical data, see Process design kits.

The canvas

The center canvas is a true physical plane measured in micrometers (µm), not a grid of abstract tiles. Every component has a real position and footprint from the moment it lands, and every route is genuine waveguide geometry between real pin locations. Because geometry is physics in a photonic circuit, what you arrange here is what gets fabricated.

Pins and connection state

A component's optical ports are its pins, drawn at fixed physical positions. The canvas shows connection state with colour: a pin renders red when unconnected and green when connected. This tells you at a glance what is still open and keeps you from leaving ports dangling as a circuit grows.

Routing in Connect mode attaches a waveguide to these pins, drawn as a real S-bend or Manhattan path between the two physical locations. Every bend and detour costs optical power, so the route's shape is something you can see and refine — see Routing waveguides.

Properties, sweeps, and the assistant

The right panel is context-sensitive. With a component selected it shows its properties — for example, a ring resonator exposes its radius, which you can set in real units such as r = 10 µm. It also hosts parameter sweeps for exploring how a value affects the design, and the AI assistant.

The assistant works over the structured circuit state — components, pins, routes, hierarchy, and physical constraints — so natural-language editing stays grounded in the real design rather than free-form chat. Ask it to "add a ring filter on the lower arm at 1550 nm" and it places a ring resonator (r = 10 µm) on pin PS2.out, routes it to CMB.in2, and re-checks loss. The AI assistant page covers what it can act on.

The status bar and Simulate

The status bar along the bottom surfaces live information about the design, including the current loss readout. This is where the result of a simulation check lands.

Running Simulate animates a power-flow gradient along the waveguides — teal to green to yellow to red — so you can watch power propagate and attenuate through the circuit, with a loss value reported alongside. Because it reads the actual geometry, the feedback reflects the layout in front of you, not a schematic estimate.

Next steps